#pragma once

// clang-format off
#define RADSIM_ROOT_DIR "/home/bassiabn/rad-sim/rad-flow/rad-sim"

// NoC-related Parameters
#define NOC_LINKS_PAYLOAD_WIDTH   82
#define NOC_LINKS_VCID_WIDTH      3
#define NOC_LINKS_PACKETID_WIDTH  32
#define NOC_LINKS_TYPEID_WIDTH    3
#define NOC_LINKS_DEST_WIDTH      21
#define NOC_LINKS_DEST_INTERFACE_WIDTH 5
#define NOC_LINKS_WIDTH           (NOC_LINKS_PAYLOAD_WIDTH + NOC_LINKS_VCID_WIDTH         + NOC_LINKS_PACKETID_WIDTH + NOC_LINKS_DEST_WIDTH + NOC_LINKS_DEST_INTERFACE_WIDTH)

// AXI Parameters
#define AXIS_MAX_DATAW 512
#define AXI4_MAX_DATAW 512
#define AXIS_USERW     75
#define AXI4_USERW     64
// (Almost always) Constant AXI Parameters
#define AXIS_STRBW  8
#define AXIS_KEEPW  8
#define AXIS_IDW    NOC_LINKS_PACKETID_WIDTH
#define AXIS_DESTW  NOC_LINKS_DEST_WIDTH
#define AXIS_DEST_FIELDW  7
#define AXI4_IDW    8
#define AXI4_ADDRW  64
#define AXI4_LENW   8
#define AXI4_SIZEW  3
#define AXI4_BURSTW 2
#define AXI4_RESPW  2
#define AXI4_NODE_ADDRW 7
#define AXI4_CTRLW  (AXI4_LENW + AXI4_SIZEW + AXI4_BURSTW)

// AXI Packetization Defines
#define AXIS_PAYLOADW (AXIS_MAX_DATAW + AXIS_USERW + 1)
#define AXIS_TLAST(t) t.range(0, 0)
#define AXIS_TUSER(t) t.range(AXIS_USERW, 1)
#define AXIS_TDATA(t) t.range(AXIS_MAX_DATAW + AXIS_USERW, AXIS_USERW + 1)
#define AXIS_TSTRB(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW, AXIS_MAX_DATAW + AXIS_USERW + 1)
#define AXIS_TKEEP(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW, AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + 1)
#define AXIS_TID(t)   t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW, AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + 1)
#define AXIS_TDEST(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + AXIS_DESTW, AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + 1)
#define AXIS_TUSER_RANGE(t, s, e) t.range(1 + e, 1 + s)
#define DEST_LOCAL_NODE(t) t.range(AXIS_DEST_FIELDW - 1, 0)
#define DEST_REMOTE_NODE(t) t.range(2 * AXIS_DEST_FIELDW - 1, AXIS_DEST_FIELDW)
#define DEST_RAD(t) t.range(3 * AXIS_DEST_FIELDW - 1, 2 * AXIS_DEST_FIELDW)
#define AXIS_TRANSACTION_WIDTH (AXIS_MAX_DATAW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + AXIS_DESTW + AXIS_USERW + 1)
#define AXI4_PAYLOADW (AXI4_MAX_DATAW + AXI4_RESPW + AXI4_USERW + 1)
#define AXI4_LAST(t)  t.range(0, 0)
#define AXI4_USER(t)  t.range(AXI4_USERW, 1)
#define AXI4_RESP(t)  t.range(AXI4_RESPW + AXI4_USERW, AXI4_USERW + 1)
#define AXI4_DATA(t)  t.range(AXI4_MAX_DATAW + AXI4_RESPW + AXI4_USERW, AXI4_RESPW + AXI4_USERW + 1)
#define AXI4_CTRL(t)  t.range(AXI4_CTRLW + AXI4_RESPW + AXI4_USERW, AXI4_RESPW + AXI4_USERW + 1)
#define AXI4_ADDR(t)  t.range(AXI4_ADDRW + AXI4_CTRLW + AXI4_RESPW + AXI4_USERW, AXI4_CTRLW + AXI4_RESPW + AXI4_USERW + 1)

// Constants (DO NOT CHANGE)
#define AXI_TYPE_AR       0
#define AXI_TYPE_AW       1
#define AXI_TYPE_W        2
#define AXI_TYPE_R        3
#define AXI_TYPE_B        4
#define AXI_NUM_RSP_TYPES 2
#define AXI_NUM_REQ_TYPES 3

// clang-format on
